SDRAM Yields: What are these?
Submitted by SDRAM Technology on Tue, 07/28/2009 - 10:20
The SDRAM chips are manufactured on silicon wafers. Depending on the size of the chips and the size of the wafer a different number of chips can fit on one wafer. The state of the art wafers in microelectronics are at the moment (year 2009) the so called “300 mm wafers”, which certainly means that the diameter of the wafer is 300 mm. Depending on the technology node (90nm, 70nm, 60nm etc.) and the bit capacity of a SDRAM chip (512 Mb, 1Gb, 2Gb or even 4 Gb) the number of chips which can fit on one wafer can vary strongly. A typical SDRAM chips size is 30-50 mm2 and thus on a 300mm wafer can fit more that 1000 chips. A relatively high number taking into account that a normal SDRAM DIMM or SODIMM module needs 8, 16, 32 etc chips to be build.
Taking into account that the microelectronic fabrication process of SDRAM chips in Front End is very complicated (contains normally 600-700 processing steps-operations), a common question is: Do all chips on one wafer (from more than 1000) function at the end of the microelectronic process? The answer is certainly – NO!
It should be said that for each technology node (e.g. 60nm, 50nm etc.) at the very beginning of the development phase the number of functioning chips on the wafers is ZERO! This means that none of the chips are functioning and can be sold. By adjusting the manufacturing process it is possible to increase, step by step, the number of functioning chips, but this takes time – months or even years before most of the chips on the wafer will function as they should. This is the art of surviving in SDRAM business. If a company succeeds in a very short time to increase to the maximum the number of functioning chips on its wafers, then it has a big advantage relative to its competitors – it can sell more chips that the others and the production costs are reduced.
In order to measure the performance of a SDRAM factory the so called YIELDS are used. For example, a Front End Yield is actually the ratio between the number of functioning chips on one wafer and the total number of chips which fit on the wafer. In order to express the yield in percents, the ratio is certainly multiplied by 100 (Figure 1).
Figure 1: SDRAM Front End Yield definition
where in Figure 1:
- NF = number of functioning chips on the wafer
- NT = total number of chips which fit on the wafer
- NNF = number of non-functioning chips on the wafer.
Example: Lets say that a company has a developed a process which allows to fit 1100 chips on one 300 mm wafer. At a certain development phase the number of chips which are functioning after the Front End Test is only ~630 (certainly this number is varying from wafer to wafer and lot to lot). The resulting yield is: (630/1100)*100 = 57.27%. This number is good, but not good enough. A good Front End yield would be >90%. Thus, additional changes in the process schould be made in order to achieve a 90% yield.
Due to the fact that the chips are tested several times before they are sold, after each testing procedure a corresponding yield is defined. As discussed “SDRAM Factory Schematics: Back End and Front End Factories” the chips are tested at least four times:
- Front End Test – the so called Front End Yield is defined, YFE
- Chip Level Test or Back End Test – Back END Yield, YBE =the number of good chips after the testing procedure, divided by the total number of chips tested. A typical YBE>99%.
- Module Test – Module Yield, YM = the number of good modules after the testing procedure, divided by the total number of modules tested. A typical YM>99.9%.
- Module Application Test, due to the fact that the Application Test is done on a sample bases, i.e. not all modules are application tested, normally no Application Test yield is defined.
Thus the whole yield of a SDRAM process could be defined as:
Figure 2: Total Yield of a SDRAM Factory
Note: Each company has its own notations of the yield, which can differ from those used in this article. More than that, each company can define its own sub-yields in order to allow a better understanding of the failure mechanisms of the chips/modules. A sub-yield could be, for example, a ratio between the number of chips which have a standby current smaller that 4mA and the total number of chips on the wafer (see e.g. Fifure 3).
Figure3: Example of a sub-yield in a SDRAM factory